Could State-of-the-Art Chip Drive Down Cost of RFID Tags?

The UHF RFID chip, developed by a team at North Carolina State University, is said to be small enough to enable RFID tags to cost less than a cent apiece.

RALEIGH, N.C. — North Carolina State University (NCSU)’s  Department of Electrical and Computer Engineering reports that it has found a way to build an RFID chip that eliminates the majority of analog components.

The chip, according to the college, thereby relies on digital- rather than analog-based RF power harvesting. As a result, NCSU claims, it measures less than half the size of the smallest chips currently being sold.

The university says the chip compromises some sensitivity and should be readable via a standard RFID reader from a distance of only about 3 meters (9.8 feet), as opposed to 10 meters (32.8 feet) with a standard tag. But otherwise, NCSU reports, it is expected to exhibit performance similar to that of other UHF RFID chips on the market. The team is furthering research and predicts it will be able to close this sensitivity disparity gap.

The NCSU research-based chip has an area of 125 microns (0.005 inch) by 245 microns (0.01 inch). For context, a human hair is 50 microns (0.002 inch) in diameter, according to Paul Franzon, the group’s lead researcher. Franzon authored a white paper based on the project and is NCSU’s Cirrus Logic distinguished professor of electrical and computer engineering. The chip operates in the 860 to 960 MHz UHF band, with -2 dBm sensitivity.

Following years of development and testing at the NCSU lab, the group is now in discussions with potential technology partners to commercialize or license the chip for use in RFID tags. The first use cases the team is targeting, and for which they will next test the chip, involve tracking relatively low-value retail products, such as groceries, as well as embedding RFID tags in high-value ICs used in electronics in order to verify their authenticity.

This embedding method is performed during wafer fabrication using the same technology as the high-value IC, Franzon explains, and thus becomes a native functional block not requiring additional assembly steps.

The relatively large size of standard chips has posed a challenge for those looking to use RFID labels, but who cannot afford the approximately 3 to 5 cents each tag might cost in volume. When it comes to deploying such chips for relatively low-value products, the researchers explain — such as a box of cereal or a beverage, for instance — standard tags are too expensive to justify this kind of use for most companies in the retail industry.

Chips have been getting smaller, they add, with Impinj’s latest IC measuring 396 microns by 296 microns (0.02 inch by 0.01 inch).

To develop the smaller and potentially lower-cost chip, the university team eliminated much of the area of a standard, more analog-based RFID chip. Standard chips, Franzon says, are design-intensive, as well as complex and less scalable.

Conventional tags first harvest power from a reader interrogation, they rectify the received RF signal into a DC voltage with the help of a multistage rectifier. Charge pumps and other power-management units are then required to boost the energy for a tag’s response to that interrogation, and such boosters typically consume 25 percent or more of a chip’s area.

In fact, Franzon says, a large portion of a standard UHF RFID chip is designed for that process of converting harvested power to DC and then boosting the response to a higher voltage via a charge pump. Additionally, transistors can be leaky, while older technologies, such as the 150-nanometer CMOS fabrication (the technology used for constructing integrated circuits) used in standard chips, tend to lose energy during the interrogation and response process.

The NCSU chip is an RF-only solution that requires no DC conversion. It’s a compact, mostly digital product using digital IP blocks, the team explains, thus eliminating the need for analog components (rectifiers, storage capacitors and power-management units).

Researchers developed a technique by which they could directly power the digital logic on the chip with digital logic using an AC supply. “There is no need to convert to DC,” Franzon states, “and you don’t need to boost the power.”

The technique was fairly easy to implement, he adds, and worked effectively in the lab.

According to Franzon, the small chip size is possible, in part, because it is designed in a 55-nanometer CMOS process provided by the United Semiconductor Japan Co., but it could also be accomplished at 22 nanometers. This would enable the chip to be half again the size of its predecessor, and to continue to scale in more advanced nodes.

In fact, most of the chip’s size is consumed by the digital core. Once the new chip design technique was developed, Franzon considered applicable use cases. “I thought, ‘Well, what can we use this for?’,” he recalls, “and RFID came to mind rather quickly.”

According to the researchers, the chip can be manufactured into inlays using the same conventional methods already in use for other chips. The team has worked with RFID tag assemblers in the past, says W. Shepherd Pitts, an NCSU professor, and with the right equipment they find no potential issues for assembly into an RFID inlay.

Going forward, the team intends to improve the chip’s sensitivity and perform additional prototyping, including testing for groceries and other retail uses, as well as chip-management applications. The researchers plan to build the chips into tags and interrogate them using standard readers, and they hope to license or commercialize the product.

In that effort, the team has been in discussions with several potential technology partners. While the system is employing the Gen 2 UHF RFID protocol, the same approach could be extended to other RF-powered chips, including NFC, the team reports.


This article first appeared in SSI sister publication RFID Journal where Claire Swedberg serves as Senior Editor.

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